Learn semiconductor packaging from Intel, Georgia Tech and Penn State, at 25% off.

Twelve in-person courses at IEEE-IDSPS 2026, India's conference on design, semiconductors, packaging and systems. Register through Cemetrix for 25% off, or come with your classmates and save up to 40%.

When: Sunday, December 6, 2026, 9:00 AM to 6:15 PM
Where: Novotel Visakhapatnam, Beach Road
Format: 3 tracks, four 2-hour courses in each
Deadline: Thursday, December 3

40% off For groups of 10 or more₹2,400 per student instead of ₹4,000

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We'll call you to confirm your track, fee and registration.

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Questions now? Call or WhatsApp +91 63811 94585.

How it works

You apply here, and we handle your registration with IEEE-IDSPS.

Apply
Fill in the short form above. It takes about two minutes.
Talk to us
We call you to confirm your track, the fee and how to pay.
Attend
Your seat is confirmed. Join the courses on December 6 and collect your certificate.

Pricing

The IEEE-IDSPS website gives 20% off. Registering through Cemetrix starts at 25% off, and groups save up to 40%.

Per person	IEEE-IDSPS website (20% off)	Cemetrix, 1 to 4 people (25% off)	Cemetrix, group of 5+ (30% off)	Cemetrix, group of 10+ (40% off)
Student	~~₹4,000~~ ₹3,200	₹3,000	₹2,800	₹2,400

Group rates apply to students from the same college registered together. Ask your classmates or faculty coordinator to apply with you.

The courses

Pick one room for the day. Each room runs four 2-hour courses, taught in person by the people who design and build advanced chip packages.

Schedule as published in the IEEE-IDSPS 2026 programme. Timings may be adjusted by the organisers.
Time	Room 1Design	Room 2Materials and substrates	Room 3Assembly, test, thermal and power
9:00 to 11:00 AM	What is packaging? Why advanced packaging is importantProf. Madhavan Swaminathan, Penn State, USA	Advanced package substrates: ceramic, organic and glassDr. Venky Sundaram and Dr. Habib Hichri	IC assembly: wire bond, flip chip, TCB and hybrid bondingVikas Gupta, ASE, USA
11:00 to 11:15 AM: tea and coffee
11:15 AM to 1:15 PM	Package design and architecturesDr. Arun Chandrashekar, Intel, India	2.5D interposers and RDLDr. Habib Hichri and Dr. Venky Sundaram	Power electronicsProf. Alan Mantooth, University of Arkansas, USA
1:15 to 2:00 PM: lunch
2:00 to 4:00 PM	Design for reliabilityProf. Abhijit Dasgupta, University of Maryland, USA	Packaging materials for power componentsProf. Raj Pulugurtha, Florida International University, USA	Thermal management of logic and power devicesProf. Yogendra Joshi, Georgia Tech, USA
4:00 to 4:15 PM: tea and coffee
4:15 to 6:15 PM	Power module designDr. Devan Iyer, GEA, USA	Opto-electronicsDr. Ravi Mahajan, Intel, USA	Electrical testProf. Abhijit Chatterjee, Georgia Tech, USA

What you take home

Built for engineering and science students: ECE, EEE, Mechanical, Physics and Materials.

25% to 40% off

Cheaper than registering on the IEEE-IDSPS website.

Certificate

A certificate of participation for the courses you attend.

Internship consideration

Top performers may be considered for internships.

Industry contacts

A day with speakers from Intel, ASE, GEA and leading US universities.

Teaching on December 6: Intel, ASE, GEA, Ajinomoto Fine-Techno, Penn State, Georgia Tech, University of Maryland, University of Arkansas and Florida International University.

Questions

How much does it cost?

₹3,000 per student through Cemetrix, compared with ₹3,200 on the IEEE-IDSPS website. Groups of 5 or more pay ₹2,800 each, and groups of 10 or more pay ₹2,400 each.

Can I bring my classmates?

Yes. Choose your group size in the form, or ask your faculty coordinator to call us on +91 63811 94585 and we'll register the whole group together.

Is applying the same as registering?

No. Applying tells us you're interested. Your seat is confirmed only after we speak with you and your registration is complete.

When is the last date to apply?

Apply by Thursday, December 3, so we have time to confirm your seat before the courses on December 6.

Are internships guaranteed?

No. Top performers may be considered for internships, based on eligibility and assessment.

Seats in each room are limited.

Apply now